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SX Microcontroller Time Methods

Code:

Also:

Timer tutorial (incl prescalers)

James Newton has translated the original text from Andrew Warren [fastfwd at ix.netcom.com] of Fast Forward Engineering San Diego, California for the SX:

RTCC has three components: The clock input (either from the RTCC pin or from the internal instruction clock), the prescaler, and the RTCC register.

CLOCK INPUT:

You'll probably use the internal instruction clock as your RTCC input; I'll assume that your SX is running at 50 MHz. If you are operating in Turbo mode, this means that instruction clocks occur at a 50 MHz rate.

PRESCALER:

The RTCC prescaler is set (via 4 bits in the OPTION register) to divide-by-1, -2, -4, -8, -16, -32, -64, -128, or -256. The RTCC input clock (external or internal as set by the RTS bit in the OPTION register) is passed to the prescaler, whose divided-down output is then fed to the RTCC register.

For example, if the RTCC prescaler is set to divide-by-4 and the SX is running at 4 MHz, the prescaler will send a 250 KHz clock to the RTCC register.

RTCC REGISTER:

The RTCC register can be preloaded with any 8-bit value that you like.

Each clock pulse from the prescaler increments the contents of the RTCC register. When the value in the RTCC register rolls over from 0xFF to 0x00, an interrupt occurs (the RTCC register continues to be incremented on every pulse from the prescaler, though).

INTERRUPT FLAGS:

If the RTI flag is set when the RTCC rolls over, an interrupt is generated and the SX jumps to the "interrupt vector" at location 0x04. Your interrupt-service routine at that location should check the RTCC count to determine the source of the interrupt.

At this point in the interrupt routine, you can re-load the RTCC with any appropriate value or increment it to control the exact period of the interupt cycle.

When you're finished handling the interrupt, your code should execute a RETIW instruction, which will automatically re-enable interrupts, add W to the RTCC to control the number of cycles before the next interrupt and return to your main program.

Nikolai Golovchenko says:


When waiting for RTCC overflow by testing RTCC.7 bit, the code

	sb RTCC.7
	 jmp $-1
	snb RTCC.7
	 jmp $-1

detects overflow every 4 cycles. If RTCC is used without the prescaler, the
delay after overflow may be anywhere from 0 to 3 RTCC counts. The routine below
corrects the delay, so that it is constant for all cases.

;----------------------------------------------------------------
; Wait for RTCC overflow with zero jitter
;----------------------------------------------------------------
waitZeroRTCC
	mov w, #2
	sb RTCC.7
	 jmp $-1
	snb RTCC.7
	 jmp $-1
	add w, RTCC
	and w, #3
	add PC, w
	nop
	nop
	nop
	ret

Nikolai Golovchenko says:


The one below is 1 instruction shorter :)

;----------------------------------------------------------------
; Wait for RTCC overflow with zero jitter
;----------------------------------------------------------------
waitZeroRTCC
	mov w, #-2
	sb RTCC.7
	 jmp $-1
	snb RTCC.7
	 jmp $-1
	add w, RTCC
	add PC, w
	nop
	nop
	nop
	ret

See also:


file: /Techref/scenix/lib/flow/timer_sx.htm, 6KB, , updated: 2004/6/10 14:40, local time: 2019/7/16 03:04,
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