prev: app/protel_microwave.htm -- next: pwb_reference_designators.htm
PCB Vias and Holes: Connecting layers
Double sided PCB stock is commonly available and can be etched or milled on each side and the sides connected by vias.
Multi-layer boards can be made by adhearing multiple sheets of very thin single sided stock together. 3M double-sided film # 7935 laminating adhesive works but results in boards that are *more* flexible, not less. Epoxy is better but requres the layers to be clamped together while curing. Alignment can be assured by pre-drilling holes near opposite edges and inserting pins or wires to guide the layers together.
Drill 3 extra vias, sized to fit exactly a push in map pin. Use that to align the masks or the boards (whatever you do). The trick is to have rigid pins, and to size exactly so the boards don't shift. Three pins for alignment (3 corners of a square) assure that you can't reverse a board.
Connections to the inner layers can be accomplished by plating through holes or by drilling a larger hole in the outside layers and then soldering to a pad or smaller hole on the inner layer. Solder paste and flux are helpful.
See layer stack-up text
(paraphrased from Geoff Harland 2001-07-08 7:24:00 PM)
Now the layer stackup information should be visible on the layout.
1 signal (fat traces) 2 signal 3 power 4 ground 5 signal 6 signal
A variation on this is that layers 1 and 6 are poured with ground/power copper, and/or 2 and 5, but this can get complicated. Abdulrahman Lomax
"Schwartz, Jerome" on 2001-01-10 09:22:56 AM To: "DesignerCouncil E-Mail Forum." Subject: Re: [DC] Routing suggestions on 0.8mm uBGA I recently did a design having 4 BGA's. Two were .8mm and two were .75mm. This is what I used after I talked with our manufacturing people and several fab shops. (My units are in inches) BGA PAD = .013" Solder mask opening = .019" Paste screen opening = .015" VIA = .017" FINISHED HOLE = .006" Traces on outer layer connecting BGA PAD to VIA = .006" Inner layer traces = .004" SPACE (Trace to via) = .0048" 90 degree breakout and or tangency was allowed. As in the spec. Filleting was required. Vias were tented. Via holes can be filled but only 100%. Checked by x-ray. My board thickness was .060". This was a blind via card but all BGA vias were through hole. Aspect ratio was 6:1. We have built about 120 of these with no problems in the BGA's. Regards, Jerry Schwartz, CID IPC Certified Interconnect Designer "May the Schwartz be with you" Jerry Schwartz, CID Designer 3 Harris Corporation GCSD Voice (321)-727-5474 P.O. Box 37, MS 1/9843 Fax (321)-729-5990 Melbourne, FL 32902-0037 Pager (321)-690-9797 http://harris.com DesignerCouncil Mail List Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional information, or contact Keach Sasamori at sasako @ ipc.org
|file: /Techref/pwb_layers.htm, 8KB, , updated: 2012/1/3 08:29, local time: 2021/3/4 13:57,
|©2021 These pages are served without commercial sponsorship. (No popup ads, etc...).Bandwidth abuse increases hosting cost forcing sponsorship or shutdown. This server aggressively defends against automated copying for any reason including offline viewing, duplication, etc... Please respect this requirement and DO NOT RIP THIS SITE. Questions?|
<A HREF="http://www.sxlist.com/techref/pwb_layers.htm"> layers of a PWB (PCB)</A>
|Did you find what you needed?|
Welcome to sxlist.com!
& kind contributors
just like you!
Please don't rip/copy
Copies of the site on CD
are available at minimal cost.
Welcome to www.sxlist.com!