Oliver Broad [obroad at TELINCO.CO.UK] says:
OK Usual disclaimer, this is an untested circuit but...
Take an N-type logic level FET. Connect the gate to PIC VDD and the source to the measuring pin. Put the capacitor between the pin and ground, the resistor between the drain and the voltage. Drive the input pin high and the FET turns off. No drain at all. Drive the pin low then float it and measure the charge time. Obviously the pin will not rise above the Vdd-FET Vth but this should not be a problem.
PICList Thread '[PIC]: Unknown Voltage on PIC pin.'
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