Authentic I2C Virtual Peripherals for SX-28
I2C serial bus has been widely used for over a decade to provide economical
implementations of I2C Slave protocol would not be an easy and convenient task for
commonly used microcontrollers. However, this is not the case with SX-28 microcontroller.
The advantage of fast clock (and instructions) rate of SX-28 microcontrollers makes it
possible to implement the I2C with very little burden on system resources. Authentic I2C
Slave VP takes only 1% of SX CPU resources to continuously monitor the I2C bus, and
insures timely response to I2C bus Master requests.
I2CS.src (I2C Slave) virtual peripheral consists of four relatively independent subroutines:
I2CS_Init subroutine provides correct configuration of SX-28 I/O Ports.
I2CS_Send_Byte supports transmission of the data byte to the Master.
I2CS_Get_Byte supports reception of the data byte from the Master.
I2CS_Send_Akcnowledgement generates the ACK signal.
Main I2CS module - I2CS_Execute executes the data transfer protocol based on 10-bit I2C
addressing mode. It is worth mentioning that I2CS subroutines may be combined to support
other modifications of I2C protocol.
I2CS allows Master directly access one RAM bank of the Slave SX microcontroller. Only one
byte of information can be transferred at a time.
I2CS supports bus clock rates up to 1.8 MHz, and will easily work with standard clock rate of
Demo program I2CSdemo.src is provided as an example of implementation of I2CS VP. The
demo program supports simple read and write operations to one of the SX RAM banks using
RTCC interrupt to start the I2CS VP.
Extensive documentation and source files are included.
Authentic I2CS by Authentic Engineering for Scenix Semiconductor Inc. © 1998