© 1999 Scenix Semiconductor, Inc. All rights reserved. - 1 - www.scenix.com Scenix™ and the Scenix logo are trademarks of Scenix Semiconductor, Inc.
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PIC® is a registered trademark of Microchip Technology, Inc.
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All other trademarks mentioned in this document are property of their respec-
tive companies.
PRELIMINARY February 11, 1999 Devices with Datecode yywwxx SX18AC / SX20AC / SX28AC High-Performance 8-Bit Microcontrollers with EE/Flash Program
Memory and In-System Programming Capability
1.0 PRODUCT OVERVIEW 1.1    Introduction The  SX18AC,  SX20AC,  and  SX28AC  are  members  of
the SX family of high-performance 8-bit microcontrollers
fabricated  in  an  advanced  CMOS  process  technology.
The  advanced  process,  combined  with  a  RISC-based
architecture, allows high-speed computation, flexible I/O
control,  and  efficient  data  manipulation.  Throughput  is
enhanced by operating the device at frequencies up to 50
MHz  and  by  optimizing  the  instruction  set  to  include
mostly single-cycle instructions.
On-chip  functions  include  a  general-purpose  8-bit  timer
with prescaler, an analog comparator, a brown-out detec-
tor,  a  watchdog  timer,  a  power-save  mode  with  multi-
source wakeup capability, an internal R/C oscillator, user-
selectable clock modes, and high-current outputs.
1.2    Key Features •    50 MIPS performance at 50 MHz oscillator frequency
•    2048 x 12 bits EE/Flash program memory rated for
      10,000 rewrite cycles
•    136 x 8 bits SRAM
•    In-system programming capability through OSC pins
•    Internal RC oscillator with configurable rate from 31.25
      KHz to 4 MHz, +8% accuracy
•    User selectable clock modes:
–   Internal RC oscillator
–   External oscillator
–   Crystal/resonator options
–   External RC oscillator (continued on page 3)
Figure 1-1. Block Diagram Interrupt M IW U Port B C om p Power-On Reset RESET 8-bit W atchdog Tim er (W DT) 8-bit Tim er R TCC 8 8 8 Port C 8 8 Port A 8 4 Internal Data Bus  In-System
Program m ing
   2k x 12
System Clock Brown-O ut M IW U M CLR  O SC
4M H z
 C lock
4 or 1 136 Bytes SRAM Address W rite Data R ead Data Instruction W FSR STATUS PC M ODE O PTION System  C lock OSC 1    O SC2 Fetch 8 8 12 Address 12 8 8 8 8 ALU 8 8 8 3 R TC C Analog 8 or Interrupt Stack     PC 
3 Level
D ecode Executive W rite Back IREAD Stack Prescaler for RTCC Prescaler for W D T Instruction Pipeline